1. Field of the Invention
The present invention relates to logical circuits for realizing low power consumption and suitable for very large integrated circuits.
2. Description of the Prior Art
In circuit designs such as for large scale integrated circuits (LSI circuits), various circuit combinations of basic logical circuits such as AND gate circuits, OR gate circuits, NOT circuits are utilized. For instance, when a logical system is to be constructed with CMOS transistors, then NAND gate circuits, NOR gate circuits, and NOT circuits are mainly used as basic logical circuits.
FIGS. 11 to 13 show, respectively, a NAND gate circuit, a NOR gate circuit, and a NOT circuit, each consisting of one or more P-channel MOS transistors (PMOS transistors) and one or more N-channel MOS transistors (NMOS).
Each of the logical circuits is arranged by one or more pairs of PMOS and NMOS transistors between a power supply V.sub.DD and the ground level, and each of the PMOS and NMOS transistors is controlled by an input signal to be applied to each of the input terminals of IN1 and IN2, so as to charge or discharge the output terminal, thereby realizing each desired logical function.
Namely, in these logical circuits, a predetermined logical level is given to an output terminal, corresponding to an input signal or signals by rendering the path between the power supply and the ground, or between the output terminal and the ground, conductive or non-conductive. Moreover, such unitary logical circuits as described are operated when a power supply is applied to each of the circuits. Accordingly, when a logical system is constructed with combinations of each of these unitary logical circuits, the power consumption in the system is expressed by the sum of inner penetrating current and the charging or discharging current when the output signal is changed in each of the unitary logical circuits. As a result, with the development of the large scale integrated circuits for logical systems due to an increase in the unitary logical circuits to be used, power consumption increases. For example, the power consumption of a LSI including 1,000,000 MOS transistors normally amounts 1 W to 5 W. The shortening in the switching time due to a further increase in the operation speed causes the change in the power supply current per unit hour to increase. This will result in the generation of noise current, thereby causing malfunction to occur.
On the other hand, the increase in the power consumption causes an excessive current to flow in the power supply wirings which are made very narrow due to the recent use of highly concentrated integrated circuits. As a result, the so called "electro-migration" phenomena tends to occur. This causes degradation in IC quality, which in turn results in the decrease in the reliability of the IC circuits.
Moreover, the development of LSI logical systems has made their corresponding construction become more complex and so it is often difficult to tap in to the local power supply currents in a system design stage. This in turn has made the layout of the power supply wiring system very difficult.